Offloading the KV cache of a large language model to NVMe SSDs is a viable way to serve far more concurrent users and much longer contexts on the same GPU, but it buys that capacity with a real latency penalty. A PCIe 4.0 NVMe drive delivers roughly 7 GB/s of sequential throughput with per-access latency in the 100-microsecond to 1-millisecond range—about 500 times slower in bandwidth than GPU HBM, as Spheron's engineering write-up on LMCache offloading puts it. Whether that trade is worth making depends almost entirely on your workload's latency tolerance, concurrency, and context length.

The KV Cache Bottleneck in LLM Inference

The memory pressure in modern LLM serving does not come primarily from model weights. It comes from the key-value cache: the attention states a model stores for every token it has processed so far, so it can respond coherently to new prompts without recomputing the entire history. Memblaze's technical explainer likens it to the "previously on…" recap before an episode—it lets the model recall what happened without rewatching everything.

The problem is that this cache grows linearly with context length and multiplies with concurrency. Using LLaMA2-70B as an example—80 transformer layers, 64 attention heads of 128 dimensions, FP16 precision—Memblaze calculates roughly 2.6 MB of KV cache per token. That scales to about 2.6 GB at 1,000 tokens and roughly 21.3 GB at the 8,192-token maximum for a single session. Ten concurrent sessions can then exceed 200 GB in total cache footprint, far beyond a typical GPU memory budget.

This is why researchers describe KV cache management as a first-class problem for inference. As context windows scale toward millions of tokens and active sessions multiply, the aggregate cache footprint quickly exceeds GPU HBM capacity. The arithmetic is unforgiving: GPU memory must hold both model weights and the cache, and the cache is often the term that blows the budget first.

How NVMe Offloading Works as a Solution

The architectural idea is tiering. Hot cache blocks—the ones being actively read and appended to—stay in HBM. Warm and cooler blocks, such as the cached prefixes of long conversations waiting for a user's next turn, are written out to NVMe SSDs and reloaded on demand. Because inference often involves temporal gaps between conversation turns, there is a natural window in which a session's history can sit on slower storage without anyone noticing.

The economics of the tier follow from the hardware. Enterprise NVMe SSDs now offer multi-terabyte capacities per drive, so a single server can hold tens of terabytes of cache at a small fraction of the cost of an additional HBM-equipped GPU. Samsung's PM1753, for instance, is specified at up to 14.5 GB/s of sequential throughput and 3.3 million random read IOPS—bandwidth and parallelism the company positions as suited to KV cache offloading at scale.

Notably, the access pattern is favorable. A 2025 characterization from the atlarge research group on model and KV cache offloading workloads found they use large I/O sizes—around 128 KiB—and are dominated by reads. That profile is closer to sequential streaming than to the small random accesses that punish SSDs, which is why the researchers see an opportunity to optimize storage devices, including NVMe interfaces like ZNS and FDP that give more control over data placement and parallelism, for this emerging class of workload.